1. Field of the Invention
This invention relates to semiconductor memory devices, and more particularly, to a semiconductor read-only memory (ROM) device of the type including an array of diode-based memory cells for permanent storage of binary-coded data. Moreover, the invention relates to a method of fabricating such a ROM device.
2. Description of Related Art
Read-only memory (ROM) is a nonvolatile semiconductor memory widely used in computer and microprocessor systems for permanently storing information including programs and data that are repeatedly used, such as the BIOS (abbreviation for Basic Input/Output System, a widely used operating system on personal computers) or the like. The manufacture of ROMs involves very complicated and time-consuming processes and requires costly equipment and material to achieve. Therefore, the data to be permanently stored in ROMs is usually first defined by the customer and then furnished to the factory to be programmed into the ROMs.
Most ROMs are identical in semiconductor structure except for the different data stored therein. Therefore, the ROM devices can be fabricated up to the stage ready for the programming and then the semi-finished products are stocked in inventories waiting for customer orders. The customer then furnishes the data to the factory where the data are stored into the semi-finished ROMs by using the so-called mask programming process. This procedure is now a standard method in the semiconductor industry for fabricating ROMs.
In most conventional ROMs, metal-oxide semiconductor field-effect transistors (MOSFET) are used as the memory cells for the data storage. In the mask programming stage, impurities are doped into selected channel regions so as to provide the associated memory cells with different threshold voltage levels representing the storage of different values of the binary-coded data. Whether one MOSFET-based memory cell is set to store a binary digit of 0 or 1 is dependent on whether the associated channel region is doped with impurities or not. If one channel region is doped with impurities, the associated MOSFET-based memory cell is set to have a low threshold voltage, effectively setting the MOSFET-based memory cell to a permanently-ON state representing the storage of a first binary digit, for example 0; otherwise, the MOSFET-based memory cell is set to have a high threshold voltage, effectively setting the MOSFET-based memory cell to a permanently-OFF state representing the storage of a second binary digit, for example 1.
One conventional MOSFET-based ROM device is shown in FIGS. 1A through 1C, in which FIG. 1A is a schematic top view of the ROM device; FIG. 1B is a cross sectional view of the ROM device of FIG. 1 cutting through the line A-A'; and FIG. 1C is a cross sectional view of the ROM device of FIG. 1 cutting through the line B-B'.
As shown, the conventional MOSFET-based ROM device includes a semiconductor substrate, such as a P-type silicon substrate, on which a plurality of parallel-spaced bit lines 11 and a plurality of parallel-spaced word lines 13 intercrossing the bit lines 11 are formed. The word lines 13 are isolated from the underlying bit lines by an oxidation layer 12. This ROM device includes an array of MOSFET-based memory cells 14, each being associated with one segment of the word lines 13 between each neighboring pair of the bit lines 11.
Referring to FIG. 1C, in the method for fabricating the foregoing ROM device, the first step is to conduct an ion implantation process so as to dope an N-type impurity material, such as arsenic (As), into selected regions of the substrate 10 to form a plurality of parallel-spaced diffusion regions serving as the bit lines 11. The interval region between each neighboring pair of the bit lines 11 is used to serve as a channel region 16. Subsequently, a thermal oxidation process is conducted on the wafer so as to form the oxidation layer 12 over the entire top surface of the wafer. Next, a conductive layer, such as a highly-doped polysilicon layer is formed over the wafer, and then selectively removed through a photolithographic and etching process. The remaining portions of the conductive layer are used to serve as the word lines 13. This completes the fabrication of a semi-finished product of the ROM device waiting for customer order.
In the mask programming process, a mask layer 15 is first formed over the wafer. This mask layer 15 is predefined to form a plurality of contact windows according to the bit pattern of the binary-coded data that are to be programmed into the ROM device for permanent storage. These contact windows expose those channel regions that are associated with a selected group of the MOSFET-based memory cells of the ROM device that are to be set to a permanently-ON state. The covered MOSFET-based memory cells are to be set to a permanently-OFF state. Subsequently, an ion implantation process is conducted on the wafer so as to dope a P-type impurity material, such as boron (B), through the contact windows in the mask layer 15 into the exposed channel regions. This completes the so-called code implant process.
In the finished product of the ROM device, the doped channel regions cause the associated MOSFET-based memory cells to be set to have a low threshold voltage, effectively setting those MOSFET-based memory cells to a permanently-ON state representing the permanent storage of a first binary digit, for example 0. On the other hand, the undoped channel regions cause the associated MOSFET-based memory cells to be set to have a high threshold voltage, effectively setting those MOSFET-based memory cells to a permanently-OFF state representing the permanent storage of a second binary digit, for example 1.
One drawback to the foregoing MOSFET-based ROM device is that it involves quite a complex process to fabricate. Moreover, when the semiconductor structure of the MOSFET-based memory cells are further downsized for increased integration, the adverse effect of punch-through will occur, making the downsizing unable to realize. Still moreover, since the N.sup.+ diffusion regions, which serve as bit lines, have a fixed cross-sectional resistance of about 100 .OMEGA./sq. (ohm per square) and are formed with a small cross section based on the conventional structure, the resistance of the bit lines are high. This causes the current from the bit lines during access operation to be low. In making a ROM device, it is usually desirable to make the current from the bit lines to be high during access operation such that the current can be easily detected.